https://forum.asrock.com/ Copyright (c) 2006-2013 Web Wiz Forums - All Rights Reserved. Sat, 04 Apr 2026 12:04:15 +0000 Mon, 08 Mar 2021 12:12:57 +0000 http://blogs.law.harvard.edu/tech/rss Web Wiz Forums 12.04 360 https://forum.asrock.com/RSS_post_feed.asp?TID=18303 https://forum.asrock.com/forum_images/web_wiz_forums_black.png https://forum.asrock.com/ https://forum.asrock.com/forum_posts.asp?TID=18303&PID=84527&title=z490-taichi-block-diagram-of-shared-lanes#84527 Author: scostigan
Subject: 18303
Posted: 08 Mar 2021 at 12:12pm

Z490 TaiChi - Do you have a Block diagram of what lanes are shared among the PCIe slots, M.2 slots and the onboard/rear panel connectors.

I was scratching my head why the M2_3 slot was only PCIx 3x2. Then I saw that I need to disable the third party USB controllers, which the side effect is that is shuts of the USB C Gen3.2 2x2 port on the rear I/O panel and maybe other ports as well. I still have not tested all of them yet.]]> Mon, 08 Mar 2021 12:12:57 +0000 https://forum.asrock.com/forum_posts.asp?TID=18303&PID=84527&title=z490-taichi-block-diagram-of-shared-lanes#84527