https://forum.asrock.com/ Copyright (c) 2006-2013 Web Wiz Forums - All Rights Reserved. Sat, 30 May 2026 01:03:34 +0000 Mon, 14 Oct 2024 17:22:33 +0000 http://blogs.law.harvard.edu/tech/rss Web Wiz Forums 12.04 360 https://forum.asrock.com/RSS_post_feed.asp?TID=72672 https://forum.asrock.com/forum_images/web_wiz_forums_black.png https://forum.asrock.com/ https://forum.asrock.com/forum_posts.asp?TID=72672&PID=156201&title=x670e-bios-info#156201 Author: NDRE28
Subject: 72672
Posted: 14 Oct 2024 at 5:22pm

johnwbyrd wrote: After being incredibly annoyed by the sh*tty job that ASRock has done, in documenting the functionality of their own motherboards, I have done my own background research and added my own knowledge, in an attempt to provide actual non-sh*tty documentation for ASRock's X670E Taichi Carrarra motherboard. This documentation may or may not be correct, but it's a lot better than the sh*t documentation that ASRock has provided you, so I hope it helps. When the mods delete this post for being too honest, I'll probably post it on my own blog, where you can find it with Google. --- SMT Control: Enables or disables symmetric multithreading, which presents one core to the operating system as two cores. Can moderately speed up applications, but don't expect miracles. Prefetcher settings: Causes both the L1 and L2 cache to prefetch needed instructions and data, instead of waiting for them to actually be demanded. In principle, speeds up most operations, unless your program is for some reason doing cache-unfriendly things. Core watchdog timer enable: A "core watchdog timer," in principle, needs to be petted and serviced by the operating system every now and then; if it isn't, the hardware will assume that the operating system has hung, and hard reset the computer without warning. RedirectForReturnDis: Official description: "From a workaround for GCC/C000005 issue for XV Core on CZ A0, setting MSC001_1029 Decode Configuration (DE_CFG) bit 14 [DecfgNoRdrctForReturns] to 1." "XV Core on CZ" likely refers to AMD APUs with the Carrizo codename, which make use of Excavator (abbreviated XV) cores. This setting is probably related to a bug encountered by the GCC-compiler on these processors, although I could find no mention of the bit mentioned in the description in any AMD papers. Core Performance Boost: https://en.wikipedia.org/wiki/AMD_Turbo_Core Global C-state Control: C-states are a CPU power-saving technology that allows a processor to reduce power consumption by turning off unused components when idle: C-state Description C0 The CPU is actively executing instructions C1 The CPU is idle, but fully online C1E The CPU is idle, but its clock-speed has been reduced C2 The CPU clock is stopped, but the processor maintains all software-visible state C3 The CPU clock is stopped and voltage reduced C6 The CPU internal/external clocks are stopped, voltage reduced or powered off Local APIC Mode: Local APIC mode is a setting that controls how an Advanced Programmable Interrupt Controller (APIC) handles interrupts. The APIC receives interrupts from various sources and sends them to the processor core for handling. ACPI _CST C1 Declaration: Should the operating system be informed about the state of C1? Platform First Error Handling: Prevent correctable memory errors from being reported to the operating system. MCA error thresh enable: https://en.wikipedia.org/wiki/Machine_Check_Architecture MCA FruText: Populates Machine Check Architecture registers with a text description of what went wrong, in case of a bad processor or memory error. SMU and PSP Debug Mode: When this option is enabled, uncorrected errors detected by the System Management Unit or the Platform Security Processor that should cause a cold reset, will hang and not reset the system. PPIN Opt-in: Enable a unique identifier on the processor; usually useful for server rooms. SNP Memory (RMP Table) Coverage: Enable AMD's Secure Nested Paging functionality for all or some memory. Probably important if you're running virtual machines. SMEE: Secure virtual memory encryption. Makes it harder for virtual machines to read other virtual machines' memory. Action on BIST Failure: What to do if the built-in self-test fails. Unfortunately, although it seems like the Down-CCD option refers to the Core Complex Die (aka the main processor chip), it's not clear whether Down-CDD implies underclocking it and trying it again, or just turning it off. you, ASRock. Log Transparent Errors: "Log transparent errors in MCA in addition to debug registers."   Your guess is as good as mine. you, ASRock. MONITOR and MWAIT disable: Turns off these key processor instructions for saying "no work is pending on this processor." Causes the processor to consume a lot more electricity while doing nothing. May be relevant for power consumption problems. To make things even more awesome, ASRock has "enable" meaning "disable the feature", and "disable" meaning "enable the feature." you, ASRock. PAUSE delay: Time to pause the processor after a PAUSE instruction. SVM Lock: Has to do with processor virtualization ??seems to make sure that a child virtual machine cannot attempt to unlock a certain set of control registers.

Hello!

You're, definitely, very frustrated on ASRock's lack of technical informations.
But, most users never touch those settings (I do, but I'm like you, an exception from the rule).
Let's keep in mind that ASRock offered these Taichi boards at pretty low prices, while offering top notch features (like those 24+2+1 VRMs; Thermal backplate; M.2 heatsinks, etc.).
Asus & MSI are charging users a lot more for such features!

I am happy with my X670E Taichi.

Also, everytime I have contacted their technical support (even on issues that weren't related to their motherboard, directly), they have been amazingly supportive, offering me infos & even beta BIOSes via e-mail.

#ASRockRocks!!!
]]> Mon, 14 Oct 2024 17:22:33 +0000 https://forum.asrock.com/forum_posts.asp?TID=72672&PID=156201&title=x670e-bios-info#156201 https://forum.asrock.com/forum_posts.asp?TID=72672&PID=156193&title=x670e-bios-info#156193 Author: johnwbyrd
Subject: 72672
Posted: 14 Oct 2024 at 9:19am

After being incredibly annoyed by the sh*tty job that ASRock has done, in documenting the functionality of their own motherboards, I have done my own background research and added my own knowledge, in an attempt to provide actual non-sh*tty documentation for ASRock's X670E Taichi Carrarra motherboard.

This documentation may or may not be correct, but it's a lot better than the sh*t documentation that ASRock has provided you, so I hope it helps.

When the mods delete this post for being too honest, I'll probably post it on my own blog, where you can find it with Google.

---

SMT Control: Enables or disables symmetric multithreading, which presents one core to the operating system as two cores. Can moderately speed up applications, but don't expect miracles.
Prefetcher settings: Causes both the L1 and L2 cache to prefetch needed instructions and data, instead of waiting for them to actually be demanded. In principle, speeds up most operations, unless your program is for some reason doing cache-unfriendly things.
Core watchdog timer enable: A "core watchdog timer," in principle, needs to be petted and serviced by the operating system every now and then; if it isn't, the hardware will assume that the operating system has hung, and hard reset the computer without warning.
RedirectForReturnDis: Official description: "From a workaround for GCC/C000005 issue for XV Core on CZ A0, setting MSC001_1029 Decode Configuration (DE_CFG) bit 14 [DecfgNoRdrctForReturns] to 1." "XV Core on CZ" likely refers to AMD APUs with the Carrizo codename, which make use of Excavator (abbreviated XV) cores. This setting is probably related to a bug encountered by the GCC-compiler on these processors, although I could find no mention of the bit mentioned in the description in any AMD papers.
Core Performance Boost: https://en.wikipedia.org/wiki/AMD_Turbo_Core
Global C-state Control: C-states are a CPU power-saving technology that allows a processor to reduce power consumption by turning off unused components when idle:
C-state
Description
C0
The CPU is actively executing instructions
C1
The CPU is idle, but fully online
C1E
The CPU is idle, but its clock-speed has been reduced
C2
The CPU clock is stopped, but the processor maintains all software-visible state
C3
The CPU clock is stopped and voltage reduced
C6
The CPU internal/external clocks are stopped, voltage reduced or powered off

Local APIC Mode: Local APIC mode is a setting that controls how an Advanced Programmable Interrupt Controller (APIC) handles interrupts. The APIC receives interrupts from various sources and sends them to the processor core for handling.
ACPI _CST C1 Declaration: Should the operating system be informed about the state of C1?
Platform First Error Handling: Prevent correctable memory errors from being reported to the operating system.
MCA error thresh enable: https://en.wikipedia.org/wiki/Machine_Check_Architecture
MCA FruText: Populates Machine Check Architecture registers with a text description of what went wrong, in case of a bad processor or memory error.
SMU and PSP Debug Mode: When this option is enabled, uncorrected errors detected by the System Management Unit or the Platform Security Processor that should cause a cold reset, will hang and not reset the system.
PPIN Opt-in: Enable a unique identifier on the processor; usually useful for server rooms.
SNP Memory (RMP Table) Coverage: Enable AMD's Secure Nested Paging functionality for all or some memory. Probably important if you're running virtual machines.
SMEE: Secure virtual memory encryption. Makes it harder for virtual machines to read other virtual machines' memory.
Action on BIST Failure: What to do if the built-in self-test fails. Unfortunately, although it seems like the Down-CCD option refers to the Core Complex Die (aka the main processor chip), it's not clear whether Down-CDD implies underclocking it and trying it again, or just turning it off. you, ASRock.
Log Transparent Errors: "Log transparent errors in MCA in addition to debug registers."   Your guess is as good as mine. you, ASRock.
MONITOR and MWAIT disable: Turns off these key processor instructions for saying "no work is pending on this processor." Causes the processor to consume a lot more electricity while doing nothing. May be relevant for power consumption problems. To make things even more awesome, ASRock has "enable" meaning "disable the feature", and "disable" meaning "enable the feature." you, ASRock.
PAUSE delay: Time to pause the processor after a PAUSE instruction.
SVM Lock: Has to do with processor virtualization ??seems to make sure that a child virtual machine cannot attempt to unlock a certain set of control registers.
]]> Mon, 14 Oct 2024 09:19:37 +0000 https://forum.asrock.com/forum_posts.asp?TID=72672&PID=156193&title=x670e-bios-info#156193