X670E Pro RS PCIe x1 Slots Disabled£

Message Topic Search Topic Options Post Reply Create New Topic Printable Version Translate Topic

   A couple of reviews of the X670E Pro RS mentioned that to use the PCIe x1 slots, I need to disable WiFi. I can find no such restriction in the downloaded user manual. IS this restriction true, and if so, exactly how do I disable the Wifi?

Obviously, if this restriction is false, I can ignore it.

I'm trying to get around some of the issues I'm having with adding SATA drives to my X670E Pro RS system (https://forum.asrock.com/forum_posts.asp?TID=25385&title=asrock-x670e-pro-rs-limited-to-4-sata-ports).

Author	Message Topic Search Topic Options Post Reply Create New Topic Printable Version Translate Topic
Doug4.7 Members Profile Send Private Message Find Members Posts Add to Buddy List Newbie Joined: 21 Jan 2023 Location: USA Status: Offline Points: 160	Post Options Post Reply Quote Doug4.7 Report Post Thanks(0) Quote Reply Topic: X670E Pro RS PCIe x1 Slots Disabled£ Posted: 26 Jan 2023 at 2:28am
	A couple of reviews of the X670E Pro RS mentioned that to use the PCIe x1 slots, I need to disable WiFi. I can find no such restriction in the downloaded user manual. IS this restriction true, and if so, exactly how do I disable the Wifi? Obviously, if this restriction is false, I can ignore it. I'm trying to get around some of the issues I'm having with adding SATA drives to my X670E Pro RS system (https://forum.asrock.com/forum_posts.asp?TID=25385&title=asrock-x670e-pro-rs-limited-to-4-sata-ports).
	Seek Professional Help

threadzipper1957 Members Profile Send Private Message Find Members Posts Add to Buddy List Senior Member Joined: 05 Mar 2022 Status: Offline Points: 9335	Post Options Post Reply Quote threadzipper1957 Report Post Thanks(0) Quote Reply Posted: 20 Feb 2023 at 8:09pm
	These restrictions are false https://www.asrock.com/mb/AMD/X670E%20Pro%20RS/index.asp#Specification The Wifi card uses a different slot, and the PCIE1 (5.0x16 lanes) slot is connected to the CPU. The 2 PCIE (4.0x1 lane) are connected to the chipset, and as You can see in the sepcs above, they don't share resources.
	Kind Regards