Max_payload setting in BIOS |
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odiebugs
Newbie Joined: 07 Jul 2015 Status: Offline Points: 193 |
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Posted: 11 Jul 2015 at 5:49pm |
Pages 546 - 553
Edited by odiebugs - 11 Jul 2015 at 5:51pm |
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asrocking
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parsec
Moderator Group Joined: 04 May 2015 Location: USA Status: Offline Points: 4996 |
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I've never seen an option in a contemporary ASRock board's BIOS/UEFI to set the PCIe payload size. All I can suggest is checking the PCIe 3.0 specification, which discusses various payload sizes and in general where they are set: http://komposter.com.ua/documents/PCI_Express_Base_Specification_Revision_3.0.pdf |
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odiebugs
Newbie Joined: 07 Jul 2015 Status: Offline Points: 193 |
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Welcome to the board.
You probably won't see ( TLP ) Max payload, anymore. Not after the LGA 1366. That was the day's when there was a north and south bridge. Now with the north on the CPU and a South- chipset, and much higher lanes, they are more likely set to max default as there is no reason to limit them with what they can transfer now. Before, the root port could be flooded with data and cause crashing.
This is my understanding, you could contact support and see if it was possible to add this back in a modded BIOS for you, that's all I can tell you. |
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asrocking
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futurehitech
Newbie Joined: 11 Jul 2015 Status: Offline Points: 3 |
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Hi,
In our application, we would need to change the max_payload setting in BIOS for the PCIe bus. I understand that the value can range from 128 to 4096 bytes. we are interested in setting it to 4096 Bytes. However, I do not see such an option in BIOS, but from testing, we notice the MB is taking 256 Byte as the default/max value. Could you let me know what is the roadmap on enabling the max_payload for PCIe bus and what is the max number? Thanks,
FHT |
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