X570 pro 4 - GPU in slot 3£

Based on what I know about how the CPU itself works, and the various configurations listed in the manual, I believe this is how they're wired:

For this example, I'm using Matisse & Vermeer (same IO-Die) CPUs, with total of 24 PCIe Gen.4 lanes.

4 of them are used to connect to the chipset.
So 20 lanes are available for direct connection.

16x goes to PCIe Slot1.
4x goes to M2_1.

That's it! We're now out of direct-to-CPU lanes!

So PCIe Slot3 is from the chipset, and is only 4 lanes. I'm certain that the motherboard will only have 4 lanes worth of traces, because, why waste traces that won't even connect to anything?

M2_3 as well as PCIe Slots2/4 are also from the chipset.

Putting a high performance GPU in PCIe Slot3 means you're incurring additional latencies (data is all going through the chipset), but far worse problem is that it will only get 4 lanes worth of bandwidth. In fact, it's actually less than that, because CPU<->Chipset is only 4 lanes, and those are used for many other things (PCIe Slots2/4, M2_3, and other chipset functions like additional USB ports).


Edited by eccential - 26 Feb 2023 at 11:23am

shootz wrote: So just to be clear, even with no GPU in slot 1, slot 3 will always be 4 lanes only, correct?

Correct. What you do with Slot1 has nothing to do with Slot3.
Slot1 is directly wired to CPU (16 lanes).
Slot3 is wired to chipset (4 lanes).