x299 Taichi - PCI-E-3.0-Lanes

jenairen wrote: Hello, I have a question regarding lane usage of the x299 Taichi. I'm interest in the i7-7820X (28 lanes). As far as I know the PCH of the X299 (Basin Falls) chipset offers additionally 24 PCI-E-3.0-Lanes. Since I want to use three GPUS the lanes to the CPU (according to the manual) are divided in x8, x8, x8, x4 (NVME). Is it possible to install more than one PCIE-NVME (operating at full speed), which uses the lanes from the PCH? Or do I need to buy an i9-7900X (44 lanes)? Greetings

Since the Intel 100 and 200 series "Mainstream/Performance" chipsets (Z170 and Z270 for example), the DMI3 resources (DMI3 = PCIe 3.0) provided by the PCH/chipset are used for the M.2 slots, for PCIe NVMe SSDs. The PCIe 3.0 lanes provided by the CPU are only allocated to the PCIe slots, and not used or shared with the M.2 slots.

The same is true for the new X299 chipset, with a slight variation. Two of the three Ultra M.2 slots on the X299 Taichi use the DMI3/PCIe 3.0 lanes from the X299 chipset. The M2_1 slot uses four of the CPU's PCIe lanes, leaving the remaining PCIe 3.0 lanes provided by the CPU for the PCIe slots.

The difference between X299 and the chipsets mentioned above, is the Z170 and Z270 share resources between the M.2 slots and the SATA ports. You lose two SATA ports for each M.2 slot used on Z170 and Z270.

The X299 boards will not lose SATA ports when NVMe SSD are used in the M2_2 and M2_3 slots. One SATA port will be lost for each M.2 SATA SSDs used in the M2_2 and M2_3 slots.

So you can use three M.2 NVMe SSDs in this and other X299 boards, at the full PCIe 3.0 x4 interface, while using only four of the PCIe 3.0 lanes from the CPU that are used for the PCIe slots.

The only caveat to this is if you were using M.2 to PCIe slot adapter cards for the M.2 NVMe SSDs, installed in any of the PCIe slots. Then you would be using the PCIe lanes from the CPU, rather than the resources of the PCH/chipset.

Also, I want to clarify the PCIe slot lane allocation on the X299 Taichi, which will be similar for any X299 board, when a processor with 28 PCIe 3.0 lanes is used. In that case the PCIe slot lane allocation will be, from the X299 Taichi specs:

If you install CPU with 28 lanes, PCIE1/PCIE2/PCIE3/PCIE5 will run at x16/x0/x8/x0 or x8/x0/x8/x8.

http://www.asrock.com/mb/Intel/X299%20Taichi/index.asp#Specification

That will leave the M2_1 slot using four PCIe 3.0 lanes from the CPU, as you know. But you are correct about the general CPU to PCIe slot, PCIe 3.0 lane allocation.

I'm glad you are checking the specifications and asking about this, since some people make assumptions about the resource allocation of the limited number of PCIe lanes, which differs between PC platforms. They tend to blame the mother board manufacture when they don't get what they want or expect. The mother board manufacture can only use what is provided by the manufacture of the processor and chipset. Different boards may have different PCIe lane allocations, depending upon the feature set of the board. As things become more complex with the addition of M.2 slots, we must pay close attention to the specifications, so we are not disappointed when we don't get what we expect.